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Cases solved on gate hardware
Three problems from D-Wave's public catalogue, solved on IBM Heron r2. Gate-model QPC jobs with public IDs.
Plain English
D-Wave's headline systems are quantum annealers. An annealer searches for the low-energy state of one optimization landscape at a time, typically a QUBO or Ising problem.
QPC executes on universal gate-model hardware. Here that is IBM's 156-qubit Heron r2 processor (ibm_fez): programmed circuits, co-resident contextures, one readout.
The question this report answers is direct: take problems D-Wave demonstrates as commercial strengths, and show that QPC delivers a quantum solution to those public instances on the gate layer.
The findings below are reproducible from public artefacts and on-record IBM job identifiers.
The contrast needs no embellishment. Set the two architectures side by side, using only what each company publishes about its own systems.
Runs on universal gate-model hardware (IBM Heron r2). Programmed quantum circuits on a Heron-class processor.
Encodes each problem as a cost Hamiltonian over qubits and finds its ground state through a programmed quantum circuit.
Polycontextural by design: multiple logical contextures coexist within a single 152-qubit execution.
Headline systems are quantum annealers: analog search of a QUBO or Ising energy landscape.
Settles a single Ising problem into a low-energy state via analog evolution.
Production-scale results often route through a classical–quantum hybrid workflow around the annealer.
On D-Wave's gate-model work. In 2021 D-Wave announced a return to gate-model quantum computing. QPC already operates on that layer: IBM Heron r2.
A full quantum computation, in the strong sense, prepares a coherent quantum state, transforms it through controlled quantum logic, uses superposition, interference and entanglement as computational resources, and measures once that evolution has built the final probability structure. That is the gate-model path QPC takes on IBM, and the same class of machine as IonQ, Google, and IQM.
A D-Wave annealer maps an optimization problem into an energy landscape and lets a physical system relax toward a low-energy state. Production work often wraps that analog step in a classical optimization framework: decomposition, constraints, embedding, and result selection.
Architecture class. Annealing as built is QUBO and Ising search. QPC is programmable polycontextural logic on a gate-model QPU. Two architectures, both using quantum physics, different computational identity.
Each case below takes a problem from D-Wave's public demonstration catalogue, builds the identical mathematical instance, and solves it on IBM's universal gate-model processor through QPC. The metric is the energy gap to the known optimum and the validity of the decoded solution. All three returned the optimum exactly.
The cleanest form of parity. D-Wave's demo is a pure QUBO: choose the feature subset that maximises information about the target while minimising redundancy. QPC computes the identical mutual-information coefficients from the same public dataset and solves the same QUBO as a cost Hamiltonian on gate hardware. Bit-identical inputs, a different machine.
The selected features (passenger class, sex, title, cabin) are precisely the variables that historically governed Titanic survival. The quantum result is optimal in energy and correct in substance.
D-Wave's bin-packing demo runs on its classical–quantum hybrid solver and uses continuous position variables. QPC takes the same physical instance and solves it by the standard gate-model route: a discretised placement model expressed as a cost Hamiltonian on universal hardware. Same problem, a different formulation, fully quantum execution.
Stated plainly: where D-Wave uses continuous variables on a hybrid solver, QPC uses a discretised encoding on a universal quantum processor. The instance is the same; the quantum execution is genuine and complete.
D-Wave's own routing pipeline is two-stage: a quantum-addressed clustering step that assigns clients to vehicles under capacity, followed by a classical routing step. QPC mirrors this structure and solves the quantum-addressed clustering as a compact 8-qubit cost Hamiltonian on gate hardware, then routes classically, as D-Wave does. The quantum part runs on the universal layer.
The clustering QUBO was encoded without slack variables, halving the qubit count and giving the gate-model circuit a clean energy landscape: a deliberate engineering choice for universal hardware. The decoded plan splits the four clients into their two natural geographic groups, each vehicle loaded exactly to capacity.
Every case above used a small qubit count and a low number of contextures, matched to what the comparison required for a fair test. The instances were sized so their optima are independently knowable and the comparison to D-Wave's problem classes is clean.
QPC's operating mode also runs many contextures concurrently within a single coherent execution: multiple logical problem-contexts evolving together in one quantum run, their amplitudes transformed through interference and entanglement before a single final readout. Combined with the QPC Noise-Reduce application, the working envelope today reaches 152 of the 156 qubits on IBM Heron r2.
The polycontextural design carries more contextures, more qubits, and more independent problem-contexts in one run, as hardware permits.
These are demonstration-scale instances, chosen so the optimum is independently knowable and the result is verifiable. Parity on public instances, on the universal layer, with job IDs on the page.