QPC × NVIDIA CUDA-Q — Hybrid Organizing Desk

Why this page exists

QPC already proved multi-logic desks on IBM Quantum. What was missing on the site was a clear demonstration that the same organizing idea can sit inside NVIDIA’s hybrid quantum–GPU world — especially CUDA-Q, the platform NVIDIA uses for accelerated quantum supercomputing.

Job N1 fills that gap: CUDA-Q runs the hybrid orchestration / simulation layer; IBM Kingston verifies the QPC co-resident QPU arm with inspectable job IDs.

What we ran

NVIDIA · CUDA-Q

Hybrid + QPC-lite on CUDA-Q

Target: qpp-cpu (CUDA-Q 0.15.1; nvidia when GPU available)
Hybrid: 3× mono-logic 9Q kernels + Borda glue
QPC-lite: 1× co-resident 15Q desk (3 contextures × 5 units)
Instance: EPA eGRID Grid Nexus panel (same as Job C)

3→1Jobs (CUDA-Q)

31→0Glue steps

IBM · Heron r2

QPU verification (Job C)

Backend: ibm_kingston
Hybrid: 3 separate Sampler jobs
QPC: 1 job · 3 pubs · 30Q desk
Shots: 4096 per circuit

QPC job ID

d9tp5ic98n5s7391u4m0

Hybrid job IDs

d9tp5db43mgs73es1vh0

d9tp5dk98n5s7391u4eg

d9tp5ds98n5s7391u4fg

IBM organizing numbers (the QPU proof)

2Jobs saved by QPC

31 → 0Classical merge glue

~1.21×Hybrid wall-clock vs QPC

On real IBM Kingston hardware, the hybrid path used three quantum jobs and 31 classical merge steps; QPC used one job and zero glue — equal shot budget.

What this means for NVIDIA cooperation

Right layer: application / organizing architecture that needs hybrid orchestration — exactly where CUDA-Q sits.

Not claimed here: NVQLink microsecond QEC decoding, a rival physical QPU, or “we replace CUDA-Q.” QPC runs with the NVIDIA hybrid stack and verifies on IBM Heron.

Cooperation altitude: credible CUDA-Q ecosystem demo + public IBM evidence — suitable for DevRel, CSP/GSI conversations, and later application tracks.

QPC meets
NVIDIA CUDA-Q